;full band coverage for 9850 dds /100 Mhz ref
.include  "8515def.inc"



.def	dd0	=r0
.def	dd1	=r1
.def	dd2	=r2
.def	dd3	=r3
.def	dd4	=r4
.def	dd5	=r5
.def	dd6	=r6
.def	dd7	=r7

.def	dv0	=r8
.def	dv1	=r9
.def	dv2	=r10
.def	dv3	=r11

.def	dr0	=r12
.def	dr1	=r13
.def	dr2	=r14
.def	dr3	=r15


.def	cnt1	=r0
.def	temp 	=r16
.def	temp1 	=r17
.def	temp2 	=r18
.def	flags 	=r19
.def	dotcnt	=r20
.def	cdak	=r21
.def	dlycnt	=r22
.def	kcnst	=r23
.def	tcnst	=r24
.def	dly	=r25
.def	dscnt	=r1
.def	mrenc	=r26
.def	bcdd	=r16
.def	bcds	=r18
.def	eadr	=r30
.def	mcnt	=r27


.equ	fbcd	=$7c
.equ	fstep	=$70
.EQU	ftword  =$74
.equ	bstep	=$78
.equ	block2	=$08
.equ	block1	=$0c
.equ	fsk	=$60
.equ	ritb	=$88
.equ	foffset	=$a0
.equ	boffset	=$a4
.equ	frcv	=$84
.equ	ritr	=$8c
.equ	srcv	=$90
.equ	fbin	=$98
.equ	ref_fre	=$94
.equ	bndp	=$61	
.equ	ddsen	=2
.equ	clock	=1
.equ	data	=0
.equ	cdsp	=$62
.equ	scdat	=$61
.equ	hlmt	=$80




.equ	mpoit	=$89
.equ	mbcd	=$8e
.equ	mbin	=$8a	



.org	$0000

	rjmp	reset
	rjmp	encoder
	nop
	nop
	nop
	nop
	nop
	rjmp	timer


reset:	ldi	temp,$ff
	out 	spl,temp
	ldi	temp,$01
	out	sph,temp	;prg counter
	clr	r0
	clr	r31
	ldi	zl,$01		;clear ram
crsram: st	z+,r0
	cpi	zl,$1e
	brne	crsram
	
	
	ser	temp		;setup ports
	out	ddra,temp
	clr	temp
	out	porta,temp
	ldi	temp,$c0
	out	ddrc,temp
	ldi	temp,$3f
	out	portc,temp

	ldi	temp,$e0
	out	ddrd,temp
	ldi	temp,$5f
	out	portd,temp
	ldi	temp,$e7
	out	ddrb,temp
	ldi	temp,$fa
	out	portb,temp	;init DDS
	nop
	sbi	portb,ddsen
	nop
	cbi	portb,ddsen
	nop
	sbi	portb,clock
	nop
	cbi	portb,clock
	nop
	sbi	portb,ddsen
	nop
	sbi	portb,data



	ldi	temp,$02
	out	mcucr,temp
	out	timsk,temp
	ldi	temp,$04
	out	tccr0,temp

	ldi	tcnst,245
	ldi	kcnst,$1c
	ldi	cdak,$1c
	ldi	temp,5
	sts	cdsp,temp	
	sei

	clr	dlycnt
tdy1:	cpi	dlycnt,2
	brne	tdy1

	set			;int LCD
	ldi	temp,$38
	rcall	lcdd
	ldi	temp,$0e
	rcall	lcdd
	ldi	temp,$06
	rcall	lcdd
	ldi	temp,$01
	rcall	lcdd
	clt

	clr	dlycnt
tdy2:	cpi	dlycnt,1
	brne	tdy2
	
	
	sbis	pind,4		;check for sig gen mode
	rjmp	sig_gen

	ldi	temp,$cd
	set
	rcall	lcdd
	clt
	ldi	temp,$53
	rcall	lcdd
	ldi	temp,$32
	rcall	lcdd
	ldi	temp,$30
	rcall	lcdd
		
		
	clr	temp
	sts	$73,temp
	sts	$72,temp
	sts	$7b,temp
	sts	$7a,temp
	sts	$78,temp
	ldi	temp,$01
	sts	$79,temp
	ldi	temp,$c6
	sts	$70,temp
	ldi	temp,$10
	sts	$71,temp
	ldi	temp,$03
	sts	fsk,temp
	ldi	temp,$01
	sts	bndp,temp
		
	sbis	pinc,0
	rjmp	test1
	
	ldi	yl,ref_fre	;get ref freq
	clr	yh
	sbi	eearh,0
	clr	eadr
	ldi	temp1,4
mref:	rcall	rdeed
	st	y+,mrenc
	inc	eadr
	dec	temp1
	brne	mref		
	lds	temp,$97
	cpi	temp,$05	;check for good data
	breq	re_3
test1:	clr	temp
	sts	$94,temp	;load default ref freq
	ldi	temp,$e1
	sts	$95,temp
	ldi	temp,$f5
	sts	$96,temp
	ldi	temp,$05
	sts	$97,temp
	
re_3:	sbis	pinc,0
	rjmp	test
	ldi	yl,foffset	;get offset
	clr	yh
	sbi	eearh,0
	ldi	eadr,$04
	ldi	temp1,8
moff:	rcall	rdeed
	st	y+,mrenc
	inc	eadr
	dec	temp1
	brne	moff
	lds	temp,$83
	cpi	temp,$ff
	brne	rst1
test:	clr	temp
	sts	$a0,temp
	sts	$a1,temp
	sts	$a2,temp
	sts	$a3,temp
	sts	$a4,temp
	sts	$a5,temp
	sts	$a6,temp
	sts	$a7,temp		
		
		

rst1:	sbis	pind,0
	sbr	flags,$80
	sbis	pind,1
	sbr	flags,$a0
	ldi	temp,$40
	out	gimsk,temp	;enable ext intreups
	rjmp	lband

encoder:nop
	sbis	pind,pd3
	rjmp	up
	sbr	flags,$02	;set b1,0 tune down
	reti
up:	sbr	flags,$03	;set b1 tune up
	reti


timer:	in	r3,sreg
	out	tcnt0,tcnst	
	dec	dly
	brne	tm3
	inc	dlycnt
tm3:	dec	kcnst
	brne	tm1
	inc	dotcnt
	mov	kcnst,cdak
tm1:	out	sreg,r3
	sbrs	flags,4
	reti
	sbis	portd,7		;side tone
	rjmp	tm2
	cbi	portd,7
	reti
tm2:	sbi	portd,7
	reti

wait1:	ldi	zl,low(cur*2)	;restore display curser
	ldi	zh,high(cur*2)
	lds	temp,fsk
	add	zl,temp
	lpm	
	mov	temp,r0
	clr	r31
	set
	rcall	lcdd
	clt

swlp:	sbis	pinc,0		;wait for buttons
	rjmp	swlp
	sbis	pinc,1
	rjmp	swlp
	sbis	pinc,2
	rjmp	swlp
	sbis	pinc,3
	rjmp	swlp
	rjmp	wait

cur:	.db	$84,$85
	.db	$86,$88
	.db	$89,$89

	
wait:	sbrc	flags,7		;poll buttons
	rjmp	wait3
	sbis	pind,0
	rjmp	padin
	sbis	pind,1
	rjmp	padin
wait2:	sbrc	flags,1
	rjmp	tune
	sbis	pinc,0
	rjmp	step
	sbis	pinc,2
	rjmp	rit
	sbis	pinc,1
	rjmp	lband
	sbis	pinc,3
	rjmp	kfunc
	sbis	pinc,4
	rjmp	kmout
	sbis	pinc,5
	rjmp	kmout2
	rjmp	wait

wait3:	sbrc	flags,5
	rjmp	wait4
	sbis	pind,1
	rjmp	t_r
	rjmp	wait2
	
wait4:	sbis	pind,0
	rjmp	t_r
	rjmp	wait2	

;RIT enter and store

rit:	rcall	beep
	sbrc	flags,3
	rjmp	xrit
	sbrc	flags,2
	rjmp	xrit
	sbr	flags,$08
	ldi	zl,low(ftword)
	ldi	yl,low(ritr)
	clr	zh
	clr	yh
	rcall	ram2ram
	ldi	zl,low(fbcd)
	ldi	yl,low(ritb)
	rcall	ram2ram
	ldi	zl,frcv
	ldi	yl,srcv
	rcall	ram2ram
	clr	r31
	rcall	lcdrit
	rjmp	wait1




xrit:	clr	zh
	clr	yh
	ldi	zl,low(ritr)
	ldi	yl,low(ftword)
	rcall	ram2ram
	ldi	zl,low(srcv)
	ldi	yl,low(frcv)
	rcall	ram2ram
	ldi	zl,low(ritb)
	ldi	yl,low(fbcd)
	rcall	ram2ram
	
	sbrs	flags,3
	rjmp	xxit
	cbr	flags,$08
	sbr	flags,$04
	
	ldi	temp,$c0
	set
	rcall	lcdd
	clt
	ldi	temp,$20
	rcall	lcdd
	ldi	temp,$80
	set
	rcall	lcdd
	clt
	ldi	temp,$54
	rcall	lcdd
	rcall	fout
	rcall	lcdout
	rjmp	wait1
	
	
xxit:	cbr	flags,$04
	ldi	temp,$80
	set
	rcall	lcdd
	clt
	ldi	temp,$20
	rcall	lcdd
	ldi	temp,$c0
	set
	rcall	lcdd
	clt
	ldi	temp,$20
	ldi	temp2,$0b
xrclr:	rcall	lcdd
	dec	temp2
	brne	xrclr
	rcall	fout
	rcall	lcdout
	rjmp	wait1

;tune DDS frequency
	
tune:	clr	yh
	clr	zh
	ldi	ZL,low(fstep)	;init Z-pointer
	ldi	YL,low(BLOCK2)	;init Y-pointer
	ldi	temp,8		
	rcall	ramloop			;move fwrd data
	sbrs	flags,0
	rjmp	tnup
	

tndn:	cbr	flags,$03
	rcall	binsub4		;cal new freq
	ldi	zl,low(block1)
	ldi	yl,low(ftword)	;store result
	rcall	ram2ram
	rcall	subcd
	rjmp	offset

	
	
tnup:	cbr	flags,$02
	rcall	binadd4
	ldi	ZL,low(BLOCK1)	;init Z-pointer
	ldi	YL,low(ftword)	;init Y-pointer	
	rcall	ram2ram		;move fwrd data	
	rcall	adbcd

offset:	sbrc	flags,6
	rjmp	no_off
	ldi	yl,low(block2)
	ldi	zl,low(foffset)
	rcall	ram2ram
	rcall	binsub4
	brcc	no_off
	lds	r12,$74
	lds	r13,$75
	lds	r14,$76
	lds	r15,$77
	rcall	binadd4
no_off:	ldi	zl,low(block1)
	ldi	yl,low(frcv)
	rcall	ram2ram
	rcall	lcdout
	rcall	fout
	cbi	portd,6
	rjmp	wait1

;change tuning rate step

step:	lds	temp,fsk
	dec	temp
	cpi	temp,$ff
	brne	tnstp
	ldi	temp,$04

tnstp:	sts	fsk,temp
	ldi	temp2,32
agn1:	cpi	temp,$00
	breq	adjadr
	subi	temp2,$08
	dec	temp
	brne	agn1	


adjadr:	ldi	ZH,high(f_table*2)
	ldi	ZL,low(f_table*2);init Z-pointer
adj2:	add	Zl,temp2
	clr	temp2
	adc	zh,temp2
	ldi	YL,low(fstep)	;init Y-pointer
	clr	r29
	ldi	temp,4
	rcall	flash2ram
	ldi	yl,low(bstep)
	ldi	temp,4
	rcall	flash2ram
	clr	zh
	rcall	beep
	rjmp	wait1




;100 Mhz values

F_TABLE:


;10Hz
	.db	$ad,$01
	.db	$00,$00

	.db	$10,$00
	.db	$00,$00

;100hz	
	.db	$c6,$10
	.db	$00,$00

	.db	$00,$01
	.db	$00,$00

;1000hz	
	.db	$c5,$a7
	.db	$00,$00

	.db	$00,$10
	.db	$00,$00

;10Khz	
	.db	$b8,$8d
	.db	$06,$00

	.db	$00,$00
	.db	$01,$00


;100Khz	
	.db	$37,$89
	.db	$41,$00
	
	.db	$00,$00
	.db	$10,$00	

;bcd add  
	
adbcd:	clr	xh
	clr	zh
	ldi	xl,fbcd
	ldi	zl,bstep
	clr	cnt1
	clc
more2:	ld	bcdd,x
	ld	bcds,z+	
	clt
	ldi	temp1,$06
bcda:	adc	bcdd,bcds
	brcc	add_0	
	set
add_0:	brhs	add_1		;if half carry not set
	add	bcdd,temp1	;    add 6 to LSD
	brhs	add_2		;    if half carry not set (LSD <= 9)
	subi	bcdd,6		;        restore value
	rjmp	add_2		;else
add_1:	add	bcdd,temp1	;    add 6 to LSD
add_2:	swap	temp1
	add	bcdd,temp1	;add 6 to MSD
	brcs	add_4		;if carry not set (MSD <= 9)
	brts	add_4		;    if previous carry not set
	subi	bcdd,$60	;	restore value 

add_4:	st	x+,bcdd
	inc	cnt1
	sbrs	cnt1,2
	rjmp	more2
	ret

;subtract bcd

subcd:	clr	xh
	clr	zh
	ldi	temp1,$60
	clr	cnt1
	ldi	xl,fbcd
	ldi	zl,bstep
	clc
	clt
more1:	ld	bcdd,x
	ld	bcds,z+	

	sbc	bcdd,bcds
	brcc	skp3
	set
skp3:	brhc	skp1
	subi	bcdd,$06
skp1:	brtc	skp2
	subi	bcdd,$60
	clt
	sec
skp2:	st	x+,bcdd
	inc	cnt1
	sbrs	cnt1,2
	rjmp	more1
	ret


flash2ram:
	lpm			;get constant
	st	Y+,r0		;store in SRAM and increment Y-pointer
	adiw	ZL,1		;increment Z-pointer
	dec	temp
	brne	flash2ram	;if not end of table, loop more
	ret				

ram2ram:ldi	temp,4
ramloop:ld	temp1,Z+	;get data from BLOCK1
	st	Y+,temp1	;store data to BLOCK2
	dec	temp		;
	brne	ramloop		;if not done, loop more
	ret


binadd4: add	r12,r8
	adc	r13,r9
	adc	r14,r10
	adc	r15,r11
	ret

binsub4: sub	r12,r8
	sbc	r13,r9
	sbc	r14,r10
	sbc	r15,r11
	ret
	
;what freq to update?	

hetfreq:	ldi	yl,frcv
	sbrc	flags,3
	ldi	yl,srcv
	rjmp	shout


txfrq:	sbis	pinb,3
	rjmp	hetfreq
	ldi	yl,low(ftword)
	sbrc	flags,3
	ldi	yl,low(ritr)
	rjmp	shout	
	
fout:	ldi	yl,low(frcv)
	sbrc	flags,2
	ldi	yl,srcv
	
;serial data to DDS
	
shout:	
	ldi	temp1,4
	ldi	temp,8
	cbi	portb,clock
	cbi	portb,ddsen
	ld	temp2,y+
mbytes:	rcall	mbits
	dec	temp1
	brne	byte_2
	clr	temp2
	ldi	temp,8
	rcall	mbits
	sbi	portb,ddsen	
	ret


mbits:	ror	temp2
	brcs	one
	cbi	portb,data
	nop
	nop
clk:	sbi	portb,clock
	nop
	nop
	nop
	cbi	portb,clock
	dec	temp
	brne	mbits
	ret	

one:	sbi	portb,data
	nop
	rjmp	clk

byte_2:	ld	temp2,y+
	ldi	temp,8
	rjmp	mbytes
	
	
	
;eeprom write

wreed:	
	out	EEARL,eadr	;output address
	out	EEDR,mrenc	;output data
	sbi	eecr,eemwe
	sbi	EECR,EEWE	;set EEPROM Write strobe
wre1:	sbic	EECR,EEWE	;if EEWE not clear
	rjmp	wre1		;    wait more
	ret

;eeprom read

rdeed:	out	EEARL,eadr	;output address
	sbi	EECR,EERE	;set EEPROM Read strobe
				;This instruction takes 4 clock cycles since
				;it halts the CPU for two clock cycles
	sbi	EECR,EERE	;set EEPROM Read strobe 2nd time
				;This instruction takes 4 clock cycles since
				;it halts the CPU for two clock cycles
	in	mrenc,EEDR	;get data
	ret

;diplay rit/xit frequency

lcdrit:	ldi	xl,$8c
	clr	xh
	ldi	temp,$c0
	set
	rcall	lcdd
	clt
	ldi	temp,$54
	rcall	lcdd
	rjmp	mlcd

;data out to lcd

lcdout:	ldi	xl,$80
	clr	xh
	ldi	temp,$81
smlcd:	set
	rcall	lcdd
	clt
mlcd:	clr	temp2
lc1:	ld	temp,-x
	swap	temp
	cbr	temp,$f0
	sbr	temp,$30
	rcall	lcdd
	inc	temp2
	cpi	temp2,$05
	breq	lc5

lc6:	ld	temp,x
	cbr	temp,$f0
	sbr	temp,$30
	rcall	lcdd
	inc	temp2
	cpi	temp2,$02
	breq	lc3
	cpi	temp2,$08
	breq	lc8
	rjmp	lc1	


lc3:	ldi	temp,$2e
	rcall	lcdd
	rjmp	lc1

lc5:	ldi	temp,$2c
	rcall	lcdd
	rjmp	lc6


lc8:	ret


lcdd:	ser	temp1
loop2:	dec	temp1
	cpi	temp1,0
	brne	loop2
	out	porta,temp
	brts	loop3
	sbi	portc,6
loop3:	nop
	nop
	sbi	portc,7
	nop
	nop
	nop
	nop
	cbi	portc,7
	cbi	portc,6
lop4:	ret


;change bands

rdbnd:	ldi	temp,$0f
	out	ddrb,temp
	in	temp,pinb
	cbr	temp,$0f
	swap	temp
	lsr	temp
	rjmp	bd1


lband:	sbrc	flags,3
	rjmp	wait1
	sbrc	flags,2
	rjmp	wait1
	sbis	pinb,4
	rjmp	rdbnd
	lds	temp,bndp
	inc	temp
	cpi	temp,$09
	brne	bd1
	clr	temp

bd1:	sts	bndp,temp
	ldi	temp2,64
bd2:	cpi	temp,$00
	breq	bd3
	subi	temp2,$08
	dec	temp
	brne	bd2	


;get band data

bd3:	ldi	ZH,high(ld10*2)
	ldi	ZL,low(ld10*2);init Z-pointer
	add	Zl,temp2
	clr	temp2
	adc	zh,temp2
	ldi	yL,fbin	;init Y-pointer
	clr	r29
	ldi	temp,4
	rcall	flash2ram
	ldi	yl,low(fbcd)
	ldi	temp,4
	rcall	flash2ram
	sbis	pinb,4
	rjmp	skprly
	lds	temp,fbcd
	out	portb,temp
skprly:	clr	temp
	sts	fbcd,temp
	
	rcall	calpwd	
	ldi	zl,ftword
	ldi	yl,block1
	rcall	ram2ram
	rcall	beep
	rjmp	offset


ld10:	.db	$60,$29
	.db	$ac,$01

	.db	$da,$00
	.db	$06,$28
	
ld12:	.db	$90,$ca
	.db	$7b,$01

	.db	$da,$00
	.db	$89,$24

ld15:	.db	$a0,$59
	.db	$41,$01

	.db	$ba,$00
	.db	$06,$21	

ld18:	.db	$c0,$08
	.db	$1d,$01

	.db	$ba,$00
	.db	$68,$18



ld20:	.db	$e0,$89
	.db	$d6,$00

	.db	$9a,$00
	.db	$06,$14


ld30:	.db	$70,$63
	.db	$9a,$00
	
	.db	$7a,$80
	.db	$11,$10

ld40:	.db	$00,$6c
	.db	$6b,$00
	
	.db	$5a,$00
	.db	$04,$07


ld80:	.db	$40,$52
	.db	$36,$00
	
	.db	$3a,$00
	.db	$56,$03

ld160:	.db	$a0,$61
	.db	$1c,$00
	
	.db	$1a,$00
	.db	$86,$01


;straight key transmit

t_r:	sbi	portd,6
	rcall	txfrq
	sbi	portd,5
	sbr	flags,$10
	sbrc	flags,5
	rjmp	trw1
trwait:	sbis	pind,1
	rjmp	trwait
	rjmp	trd1
trw1:	sbis	pind,0
	rjmp	trw1	
	
trd1:	cbi	portd,5
	cbr	flags,$10
	ldi	temp1,26
	ser	temp
trdly:	dec	temp
	brne	trdly
	dec	temp1
	brne	trdly
	rcall	fout
	cbi	portd,6
	rjmp	wait

;keyer routine

padin:	sbi	portd,6
	rcall	txfrq
	sbi	portd,5
pdkm:	ldi	mrenc,$01
pdin:	mov	kcnst,cdak
	clr	dotcnt
	sbr	flags,$10
	sbrc	flags,5
	rjmp	dash
	sbrc	flags,6
	rjmp	dot
	sbis	pind,0
	rjmp	dot
	


dash:	sec	
	rol	mrenc
	cbr	flags,$20	;clr dash flag (bit5)
dash1:	cpi	dotcnt,2
	brne	dash1
dash2:	sbis	pind,0
	sbr	flags,$40	;set dot flag  (bit6)
	cpi	dotcnt,9
	brne	dash2

space:	clr	dotcnt
	cbr	flags,$10
	brts	spl2
	cbi	portd,5
	ldi	temp1,26
	ser	temp
spwt:	dec	temp
	brne	spwt
	dec	temp1
	brne	spwt
	rcall	fout
	cbi	portd,6
	


spl1:	cpi	dotcnt,3
	brne	spl1
	sbrc	flags,5
	rjmp	padin
	sbrc	flags,6
	rjmp	padin	
	rjmp	wait1

spl2:	cpi	dotcnt,3
	brne	spl2
	sbrc	flags,5
	rjmp	pdin
	sbrc	flags,6
	rjmp	pdin
spl2a:	cpi	dotcnt,9
	sbis	pind,0
	rjmp	pdin
	sbis	pind,1
	rjmp	pdin
	brne	spl2a

	rcall	wreed
	inc	eadr
	inc	temp
	cpi	temp,44
	brne	spl3
	rjmp	stkmem
spl3:	sbis	pind,1
	rjmp	pdkm
	sbis	pind,0
	rjmp	pdkm
	cpi	dotcnt,30
	brne	spl3
	clr	mrenc
	rcall	wreed
	inc	eadr
	inc	temp
	cpi	temp,44
	brne	kpdwt
	rjmp	stkmem
kpdwt:	sbis	pind,0
	rjmp	pdkm
	sbis	pind,1
	rjmp	pdkm
	sbis	pinc,4
	rjmp	stkmem
	sbis	pinc,5
	rjmp	stkmem
	rjmp	kpdwt


	
dot:	clc	
	rol	mrenc
	cbr	flags,$40
dot1:	cpi	dotcnt,$01
	brne	dot1
dot2:	sbis	pind,1
	sbr	flags,$20
	cpi	dotcnt,3
	brne	dot2
	rjmp	space


;keyer memories


kmem2:	ldi	eadr,$4a
	sbr	flags,$01
	set
	ldi	temp,$8f
	rcall	lcdd
	clt
	ldi	temp,$32
	rcall	lcdd
kmjp1:	sbis	pinc,5
	rjmp	kmjp1
	rjmp	kmem3

kmem1:	ldi	eadr,$19
	set
	ldi	temp,$8f
	rcall	lcdd
	clt
	ldi	temp,$31
	rcall	lcdd	
kmjp2:	sbis	pinc,4
	rjmp	kmjp2


kmem3:	cbi	eearh,0
	set
	clr	temp
	cbi	portd,7
	rjmp	kpdwt



stkmem:	ser	mrenc
	rcall	wreed
	clt
	


;play back message

	ldi	eadr,$18
	sbrc	flags,0
	ldi	eadr,$49
	cbr	flags,$01
stj2:	inc	eadr
	rcall	rdeed
	cpi	mrenc,$ff
	breq	stj1	
	cpi	mrenc,$00
	breq	wdspace
	rcall	mrsout
	rjmp	stj2
	
stj1:	cbi	portd,7
	set	
	ldi	temp,$8d
	rcall	lcdd
	clt
	ldi	temp,$20
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rjmp	wait1

wdspace:clr	dotcnt
wdsjm:	cpi	dotcnt,21
	brne	wdsjm
	rjmp	stj2

kmout:	ldi	eadr,$18
	rjmp	kmot1
kmout2:	ldi	eadr,$49

kmot1:	set
	cbi	eearh,0
kmac:	sbis	pind,1
	rjmp	mexit
kmacj:	sbis	pind,0
	rjmp	kmacj
	inc	eadr
	rcall	rdeed
	cpi	mrenc,$ff
	breq	mexit
	cpi	mrenc,$00
	breq	kwdsp
	rcall 	mrsout
	rjmp	kmac

mexit:	clt
	clr	r30
	cbi	portd,5
	rcall	fout
	cbi	portd,6
mexj1:	sbis	pind,0
	rjmp	mexj1
mexj2:	sbis	pind,1
	rjmp	mexj2
	rjmp	wait

kwdsp:	clr	dotcnt
	rcall	fout
	cbi	portd,6
kds:	cpi	dotcnt,21
	brne	kds
	cpi	cdak,$17
	brlo	kds1
	rjmp	kmac
kds1:	cpi	dotcnt,31
	brne	kds1
	rjmp	kmac

;morse output 

mrsout:	sbi	portd,6
	ldi	mcnt,$08
mrs4:	rol	mrenc
	dec	mcnt
	brcc	mrs4
	

mrs2:	brtc	mrs6
	rcall	txfrq
mrs9:	sbi	portd,5
mrs6:	sbr	flags,$10
	mov	kcnst,cdak
	clr	dotcnt
	rol	mrenc
	brcs	mdsh	


mdot:	cpi	dotcnt,$03
	brne	mdot
	rjmp	mspace

mdsh:	cpi	dotcnt,$09
	brne	mdsh

mspace:	cbi	portd,5
	clr	dotcnt
	cbr	flags,$10
	brts	kspace
msp1:	cpi	dotcnt,$03
	brne	msp1
mrs1:	dec	mcnt
	brne	mrs6
mrs3:	cpi	dotcnt,9
	brne	mrs3
	cpi	cdak,$17
	brlo	mrs5
	ret
mrs5:	cpi	dotcnt,18
	brne	mrs5
	ret


kspace:	cpi	dotcnt,3
	brne	kspace
	dec	mcnt
	brne	mrs9
spx2:	cpi	dotcnt,9
	brne	spx2
	cpi	cdak,$17
	brlo	spx3
	ret
spx3:	cpi	dotcnt,18
	brne	spx3
	ret

;sound beep

beep:	clr	dly
	clr	dlycnt
	sbi	portd,6
	sbr	flags,$10
bejm:	cpi	dlycnt,1
	brne	bejm
	cbr	flags,$10
	cbi	portd,6
	ret

tun:	sbi	portd,6
	rcall	txfrq
	sbi	portd,5
	sbr	flags,$10
trwat:	sbis	pind,0
	rjmp	trwat
	sbis	pind,1
	rjmp	trwat
	cbi	portd,5
	ldi	temp1,25
	ser	temp
trdl:	dec	temp
	brne	trdl
	dec	temp1
	brne	trdl
	cbr	flags,$10
	rcall	fout
	cbi	portd,6
trdl1:	clr	dlycnt
trdl1a:	sbis	pind,0
	rjmp	tun
	sbis	pind,1
	rjmp	tun
	cpi	dlycnt,20
	brne	trdl1a
	rjmp	kfext

kfunc:	sbrc	flags,6
	rjmp	stost
	sbrc	flags,7
	rjmp	clw
	set
	ldi	temp,$8d
	rcall	lcdd
	clt
	ldi	temp,$4b
	rcall	lcdd
	ldi	temp,$53
	rcall	lcdd
	clr	dlycnt
kfw10:	sbic	pinc,3
	rjmp	speed
	cpi	dlycnt,5
	brne	kfw10	
	set
	ldi	temp,$8d
	rcall	lcdd
	clt
	ldi	temp,$54
	rcall	lcdd
	ldi	temp,$55
	rcall	lcdd
	clr	dlycnt

kfw11:	sbic	pinc,3
	rjmp	kfwt1
	cpi	dlycnt,10
	brne	kfw11	
	
	
	set
	ldi	temp,$8d
	rcall	lcdd
	clt
	ldi	temp,$53
	rcall	lcdd
	ldi	temp,$4d
	rcall	lcdd
	ldi	temp,$3f
	rcall	lcdd
	rcall	beep
	clr	dlycnt
kfwt9:	sbic	pinc,3
	rjmp	kfwt2
	cpi	dlycnt,20
	brne	kfwt9
	rjmp	cali
	
	
kfwt2:	clr	dlycnt
kfwt12:	sbis	pinc,4
	rjmp	kmem1
	sbis	pinc,5
	rjmp	kmem2
	sbis	pinc,3
	rjmp	kfext
	cpi	dlycnt,10
	brne	kfwt12


kfext:	set
	ldi	temp,$8d
	rcall	lcdd
	clt
	ldi	temp,$20
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rjmp	wait1

kfwt1:	sbis	pind,0
	rjmp	tun
	sbis	pind,1
	rjmp	tun
	cpi	dlycnt,10
	brne	kfwt1
	rjmp	kfext


;change code speed

speed:	clr	dlycnt
spd1:	sbrc	flags,1
	rjmp	tsped
	sbis	pind,0
	rjmp	cdspdn
	sbis	pind,1
	rjmp	cdspup
	sbis	pinc,3
	rjmp	kfext
	cpi	dlycnt,10
	brne	spd1
	rjmp	kfext
	
	
tsped:	sbrs	flags,0
	rjmp 	cdspup
	
cdspdn:	cbr	flags,$03
	lds	temp,cdsp
	cpi	temp,0
	breq	gtk
	dec	temp
	sts	cdsp,temp
	rjmp	gtk
	
cdspup:	cbr	flags,$02
	lds	temp,cdsp
	cpi	temp,15
	breq	gtk
	inc	temp
	sts	cdsp,temp
	
gtk:	lsl	temp
	ldi	zh,high(cdtbl*2)
	ldi	zl,low(cdtbl*2)
	add	zl,temp
	clr	temp
	adc	zh,temp
	lpm	
	mov	cdak,r0
	adiw	zh:zl,1
	lpm
	mov	kcnst,cdak
	ldi	temp,$ce
	set
	rcall	lcdd
	clt
	mov	temp,r0
	swap	temp
	cbr	temp,$f0
	subi	temp,-$30
	rcall	lcdd
	mov	temp,r0
	cbr	temp,$f0
	subi	temp,-$30
	rcall	lcdd
	sbis	pind,0
	rjmp	sssp
	sbis	pind,1
	rjmp	sssp
	rjmp	speed

sssp:	clr	dly
	clr	dlycnt
ssspp:	cpi	dlycnt,1
	brne	ssspp
	rjmp	speed

cdtbl:	.db	$39,$10
	.db	$2f,$12 
	.db	$29,$14
	.db	$23,$16 
	.db	$20,$18
	.db	$1c,$20 
	.db	$1a,$22
	.db	$18,$24 
	.db	$16,$26
	.db	$14,$28
	.db	$13,$30
	.db	$12,$32 
	.db	$11,$34
	.db	$10,$36 
	.db	$0f,$38
	.db	$0e,$40
	

;calculate phase word
	
calpwd:	cli
	clr	dd0
	clr	dd1
	clr	dd2
	clr	dd3
	clr	dr0
	clr	dr1
	clr	dr2
	lds	dv0,$94
	lds	dv1,$95
	lds	dv2,$96
	lds	dv3,$97
	lds	dd4,$98
	lds	dd5,$99
	lds	dd6,$9a
	lds	dd7,$9b
	
	ldi	temp,65	;init loop counter
	sub	dr3,dr3
	
d16_1:	rol	dd0		;shift left dividend
	rol	dd1
	rol	dd2
	rol	dd3
	rol	dd4
	rol	dd5
	rol	dd6
	rol	dd7
	dec	temp	;decrement counter
	brne	d16_2		;if done
	clr	zl
	clr	zh
	ldi	yl,ftword
	rcall	ram2ram
	sei
	ret
	
d16_2:	rol	dr0	;shift dividend into remainder
	rol	dr1
	rol	dr2
	rol	dr3
	sub	dr0,dv0	;remainder = remainder - divisor
	sbc	dr1,dv1	;
	sbc	dr2,dv2
	sbc	dr3,dv3
	brcc	d16_3		;if result negative
	add	dr0,dv0	;    restore remainder
	adc	dr1,dv1
	adc	dr2,dv2
	adc	dr3,dv3
	clc			;    clear carry to be shifted into result
	rjmp	d16_1		;else
d16_3:	sec			;    set carry to be shifted into result
	rjmp	d16_1

clw:	clr	dlycnt
clww:	sbic	pinc,3
	rjmp	wait1
	cpi	dlycnt,10
	brne	clww


;calibrate (tune) reference frequency number
	
cali:	ldi	temp,$8d
	sbis	pind,4
	ldi	temp,$cd
	set
	rcall	lcdd
	clt
	ldi	temp,$43
	rcall	lcdd
	ldi	temp,$52
	rcall	lcdd
	ldi	temp,$46
	rcall	lcdd
	rcall	beep
	clr	dlycnt
calij:	sbic	pinc,3
	rjmp	cccc
	cpi	dlycnt,20
	brne	calij
	rjmp	stoff
	
cccc:	ldi	temp,$10
	sts	$7f,temp
	clr	temp
	sts	$7e,temp
	sts	$7d,temp
	sts	$7c,temp
	ldi	temp,$80
	sts	$98,temp
	ldi	temp,$96
	sts	$99,temp
	ldi	temp,$98
	sts	$9a,temp
	clr	temp
	sts	$9b,temp
	
	rcall	calpwd
	rcall	txfrq
	rcall	lcdout

	sbic	pind,4
	rjmp	ctw1
sctw1:	sbis	pinc,0
	rjmp	sctw1
	clr	dlycnt
sctw2:	cpi	dlycnt,2
	brne	sctw2
	
scwt:	sbrc	flags,1
	rjmp	ctune	
	sbis	pinc,0
	rjmp	calabt
	rjmp	scwt
	
	
ctw1:	sbis	pinc,3
	rjmp	ctw1
	clr	dlycnt
ctw2:	cpi	dlycnt,2
	brne	ctw2
	


ctwait:	sbrc	flags,1
	rjmp	ctune
	sbis	pinc,0
	rjmp	calext
	sbis	pinc,3
	rjmp	calabt
	rjmp	ctwait
	
	
ctune:	lds	r12,$94
	lds	r13,$95
	lds	r14,$96
	lds	r15,$97
	ldi	temp,$0a
	mov	r8,temp
	clr	r9
	clr	r10
	clr	r11
	
	sbrs	flags,0
	rjmp	ctup
	
	rcall	binsub4
	rcall	subcd
	rjmp	ctx1
	
ctup:	rcall	binadd4
	rcall	adbcd
	
ctx1:	cbr	flags,$03
	sts	$94,r12
	sts	$95,r13
	sts	$96,r14
	sts	$97,r15
	rcall	calpwd
	rcall	txfrq
	rcall	lcdout
	sbic	pind,4
	rjmp	ctwait
	rjmp	scwt
	
calabt: ldi	temp,$01
	out	eearh,temp
	ldi	yl,ref_fre
	clr	yh
	clr	eadr
	ldi	temp1,4
mrdw:	ld	mrenc,y+
	rcall	wreed
	inc	eadr
	dec	temp1
	brne	mrdw

calext: ldi	temp,$8d
	sbis	pind,4
	ldi	temp,$cd
	set
	rcall	lcdd
	clt
	ldi	temp,$20
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	sbis	pind,4
	rjmp	sigre
	
	lds	temp,bndp
	rjmp	bd1	


;test for sig gen mode
	
sigre:	sbic	pinc,0
	rjmp	sig_gen
	rjmp	sigre	
	
;store IF offset
	
stoff:	ldi	temp,$8d
	set
	rcall	lcdd
	clt
	ldi	temp,$53
	rcall	lcdd
	ldi	temp,$4f
	rcall	lcdd
	ldi	temp,$3f
	rcall	lcdd
	rcall	beep
	sbr	flags,$40
	lds	temp,$a4
	cpi	temp,$ff
	brne	prvoff
	rjmp	offset
prvoff:	ldi	zl,foffset
	ldi	yl,ftword
	rcall	ram2ram
	ldi	zl,boffset
	ldi	yl,fbcd
	rcall	ram2ram
	ldi	zl,ftword
	ldi	yl,block1
	rcall	ram2ram
	rjmp	offset
	
	
	
	
stost:	clr	zh
	ldi	zl,ftword
	ldi	yl,foffset
	rcall	ram2ram
	ldi	zl,fbcd
	ldi	yl,boffset
	rcall	ram2ram
	ldi	temp1,$08
	ldi	yl,foffset
	sbi	eearh,0
	ldi	eadr,$04
stoj:	ld	mrenc,y+
	rcall	wreed
	inc	eadr
	dec	temp1
	brne	stoj
	
	
soext:	cbr	flags,$40
	ldi	temp,$8d
	set
	rcall	lcdd
	clt
	ldi	temp,$20
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	ldi	zl,ftword
	ldi	yl,block1
	rcall	ram2ram	
	lds	temp,bndp
	rjmp	bd1
			

;signal generator version





sig_gen:
	ldi	zh,high(setup*2)	;load default values
	ldi	zl,low(setup*2)
	ldi	yl,$70
	clr	yh
	ldi	temp,24
	rcall	flash2ram
	
	
	ldi	yl,ref_fre
	clr	yh
	sbi	eearh,0
	clr	eadr
	ldi	temp1,4
smref:	rcall	rdeed
	st	y+,mrenc
	inc	eadr
	dec	temp1
	brne	smref		
	lds	temp,$97
	cpi	temp,$05
	breq	sre_1
	clr	temp
	sts	$94,temp
	ldi	temp,$e1
	sts	$95,temp
	ldi	temp,$f5
	sts	$96,temp
	ldi	temp,$05
	sts	$97,temp
		
	
sre_1:	ldi	temp,$02
	sts	$60,temp
	ldi	temp,$30
	sts	$89,temp
	ldi	temp,$01
	sts	$92,temp
	

sre_2:	rcall	lcdout
	ldi	temp,$8c
	set	
	rcall	lcdd
	clt
	ldi	temp,'M'
	rcall	lcdd
	ldi	temp,'H'
	rcall	lcdd
	ldi	temp,'z'
	rcall	lcdd


	ldi	zl,ftword
	ldi	yl,fbin
	clr	zh
	clr	yh
	rcall	ram2ram
	rcall	calpwd
	rcall	sgfout
	rcall	lcdout
	
	ldi	temp,$40
	out	gimsk,temp	;enable ext intreups

	sbis	pinc,0
	rjmp	cali

sgwait1:	ldi	zl,low(sgcur*2)
	ldi	zh,high(sgcur*2)

	lds	temp,fsk
	add	zl,temp
	lpm	
	mov	temp,r0
	clr	r31
	set
	rcall	lcdd
	clt

sgswlp:	sbis	pinc,0
	rjmp	sgswlp
	rjmp	sgwait

sgcur:	.db	$8a,$89
	.db	$88,$86
	.db	$85,$84
	.db	$82,$81

	
sgwait:	sbrc	flags,1
	rjmp	sgtune
	sbis	pinc,0
	rjmp	sgstep
	rjmp	sgwait


	
sgtune:	sbrc	flags,2
	rjmp	mrtune
	sbrc	flags,7
	rjmp	ctune
	clr	yh
	clr	zh
	ldi	ZL,low(fstep)	;init Z-pointer
	ldi	YL,low(BLOCK2)	;init Y-pointer	
	rcall	ram2ram			;move fwrd data
	ldi	zl,low(fbin)
	ldi	yl,low(block1)
	rcall	ram2ram	
	sbrs	flags,0
	rjmp	sgtnup
	

sgtndn:	cbr	flags,$03
	rcall	binsub4		;cal new freq
	ldi	zl,low(block1)
	ldi	yl,low(fbin)	;store result
	rcall	ram2ram
	rcall	subcd
	nop
	lds	temp,$7f
	cpi	temp,$99
	brne	sgldial

	
	
sgtnup:	cbr	flags,$02
	rcall	binadd4
	ldi	ZL,low(BLOCK1)	;init Z-pointer
	ldi	YL,low(fbin)	;init Y-pointer	
	rcall	ram2ram		;move fwrd data	
	rcall	adbcd
	ldi	zl,low(hlmt)
	ldi	yl,low(block2)
	rcall	ram2ram
	rcall	sglimtest
	brts	sgover
	rjmp	sgldial
sgover:	sbr	flags,$03
	rjmp	sgtune

sgldial: 

	rcall	calpwd
	rcall	sgfout
	rcall	lcdout
	rjmp	sgwait1


ldmem:	clr	dlycnt
ldj2:	sbic	pinc,0
	rjmp	ldj1
	cpi	dlycnt,15
	brne	ldj2
	rjmp	strmem
ldj1:	ldi	zl,mbin
	clr	zh
	ldi	yl,fbin
	clr	yh
	rcall	ram2ram
	ldi	yl,fbcd
	rcall	ram2ram
	rcall	calpwd

	rcall	sgfout
	rcall	lcdout
	rjmp	fun1


 	

sgstep:	clr 	dlycnt
slp1:	cpi	dlycnt,2
	brne	slp1
	sbrc	flags,6
	rjmp	ldmem
	sbrc	flags,7
	rjmp	calabt
slp2:	sbic	pinc,0
	rjmp	stune
	cpi	dlycnt,15
	brne	slp2
	rjmp	memr





memr:	sbr	flags,$44
	set
	ldi	temp,$cd
	rcall	lcdd
	clt
	ldi	temp,$4d
	rcall	lcdd
	ldi	temp,$72
	rcall	lcdd
	rjmp	gmem1



mrtune:	lds	temp,$89
	sbrc	flags,0
	rjmp	mdwn
	inc	temp
	cpi	temp,$3a
	brne	gmem
	ldi	temp,$30
	rjmp	gmem

mdwn:	dec	temp
	cpi	temp,$2f
	brne	gmem
	ldi	temp,$39

gmem:	sts	$89,temp
	cbr	flags,$03
gmem1:	ldi	temp,$cf
	set
	rcall	lcdd
	clt
	lds	temp,$89
	rcall	lcdd
	
	
gmem2:	rcall	fmem
	lds	temp,$91
	cpi	temp,$ff
	brne	gmem3
	ldi	xl,$8a
	ldi	temp2,8
	clr	temp
gmem4:	st	x+,temp
	dec	temp2
	brne	gmem4
gmem3:	ldi	xl,$92
	ldi	temp,$c0
	rcall	smlcd
	rjmp	sgwait1




	
fun1:	cbr	flags,$44
	ldi	temp,$c0
	set
	rcall	lcdd
	clt
	ldi	temp,$20
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rcall	lcdd
	rjmp	sgwait1

stune:	lds	temp,fsk
	inc	temp
	cpi	temp,$07
	brne	sgtnstp
	clr	temp
	rjmp	sgtnstp	


sgtnstp:	sts	fsk,temp
	ldi	temp2,48
sgagn1:	cpi	temp,$00
	breq	sgadjadr
	subi	temp2,$08
	dec	temp
	brne	sgagn1	


sgadjadr:	ldi	ZH,high(sgf_table*2)
	ldi	ZL,low(sgf_table*2);init Z-pointer
	add	Zl,temp2
	clr	temp2
	adc	zh,temp2
	ldi	YL,low(fstep)	;init Y-pointer
	clr	r29
	ldi	temp,4
	rcall	flash2ram
	ldi	yl,low(bstep)
	ldi	temp,4
	rcall	flash2ram
	clr	r31
	rjmp	sgwait1




;100 Mhz values

sgF_TABLE:
	.db	$40,$42	;1mhz
	.db	$0f,$00

	.db	$00,$00
	.db	$00,$01

;100khz
	.db	$a0,$86
	.db	$01,$00

	.db	$00,$00
	.db	$10,$00
;10Khz	
	.db	$10,$27
	.db	$00,$00

	.db	$00,$00
	.db	$01,$00
;1000hz	
	.db	$e8,$03
	.db	$00,$00

	.db	$00,$10
	.db	$00,$00
;100hz	
	.db	$64,$00
	.db	$00,$00

	.db	$00,$01
	.db	$00,$00

	
;10hz	
	.db	$0a,$00	;step
	.db	$00,$00	

	.db	$10,$00
	.db	$00,$00

;1hz	
	.db	$01,$00
	.db	$00,$00

	.db	$01,$00
	.db	$00,$00



sgfout:	ldi	yl,ftword
	rcall	shout
	ret
	


sglimtest:cp	r11,r15
	brne	sgokyy
	cp	r10,r14
	brne	sgokyy
	cp	r9,r13
	brne	sgokyy
	cp	r8,r12
sgokyy:	brcs	sglt_1
	clt
	ret
sglt_1:	set
	ret

adje:	subi	temp,$08
	dec	temp2
	rjmp	mwr1

fmem:	ldi	temp,$50
	lds	temp2,$89
	cbr	temp2,$f0
mwr1:	cpi	temp2,0
	brne	adje
	sts	scdat,temp
	cbi	eearh,0
	ldi	temp2,8
	ldi	yl,low(mbin)
	clr	yh


sgrdeed:	out	EEARL,temp	;output address
	sbi	EECR,EERE	;set EEPROM Read strobe
				;This instruction takes 4 clock cycles since
				;it halts the CPU for two clock cycles
	sbi	EECR,EERE	;set EEPROM Read strobe 2nd time
				;This instruction takes 4 clock cycles since
				;it halts the CPU for two clock cycles
	in	temp1,EEDR	;get data
	st	y+,temp1
	inc	temp
	dec	temp2
	brne	sgrdeed
	ret


strmem:	cbi	eearh,0
	ldi	temp2,4
	lds	temp,scdat
	ldi	yl,low(fbin)
	clr	yh
	rcall	sgwre1
	ldi	temp2,4
	ldi	yl,low(fbcd)
	rcall	sgwre1
	cbr	flags,$44
	rcall	lcdout
	rjmp	fun1


sgwre1:	ld	temp1,y+
sgwreed: sbic	EECR,EEWE	;if EEWE not clear
	rjmp	sgwreed		;    wait more
	out	EEARL,temp	;output address
	out	EEDR,temp1	;output data
	sbi	eecr,eemwe
	sbi	EECR,EEWE	;set EEPROM Write strobe
	inc	temp
	dec	temp2
	brne	sgwre1
	ret








setup:	.db	$64,$00	;fstep
	.db	$00,$00

ftwrd:	.db	$80,$96	;ftword
	.db	$98,$00

	.db	$00,$01	;bstep
	.db	$00,$00

	.db	$00,$00	;fbcd
	.db	$00,$10

	.db	$c0,$0e	;high limit
	.db	$16,$02